The present invention is directed to attaching semiconductor dies to substrates and, more particularly, to attaching gold/tin (AuSn) pre-plated substrates to gallium nitride dies.
High power devices, such as those used in radio frequency (RF) applications, often require die attachment using oxidation sensitive materials, such as AuSn. Thus, the die attachment process is constrained by steps that cater to the oxidation sensitivity, which can be complex and costly. Other methods, such as providing an AuSn interface on a device back side can also be complex and costly.
Gallium nitride (GaN) die attachment in particular can be challenging aside from the requirement for AuSn preform attachment. In particular, GaN dies tend to be very thin chips with vias. The use of preforms coupled with ultra-thin dies requires extremely flat surfaces and an unreasonable level of preform volume consistency and force stability to achieve good yields. Unfortunately, the current procedures have many yield issues that can be sporadic and inconsistent per lot.
For example, present methods for GaN die attachment begin by preheating a gold pre-plated substrate to a pre-tack temperature of about 260-270° C. An AuSn precut preform is then placed on the heated substrate for pre-tack. A GaN die is thereafter attached to the preform via a pick and place collet or the like. With the GaN die in position, the temperature of the substrate is ramped up to about 310° C. to reflow the AuSn preform. The GaN is scrubbed using the collet to ensure sufficient diffusion. Finally, the collet releases the die and the substrate is cooled to below 260° C.
The cycle time for this process is relatively lengthy—typically about thirty-five (35) seconds as opposed to about five (5) seconds for non-GaN devices, or seven (7) times longer. The process also often results in yield issues, including excessive solder overflow and shorts, incomplete wettings, die cracking, and voids attributable to the use of preforms.
AuSn wafer back metal processes also suffer from drawbacks. In particular, back side AuSn chipping can impact die attachment quality. The AuSn is also exposed, and can therefore suffer from oxidation during handling prior to die attachment.
It is therefore desirable to provide a substrate that can improve cycle times and reduce yield issues.